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  pin configurations appear at end of data sheet. general description the max3280e/max3281e/max3283e/max3284e are single receivers designed for rs-485 and rs-422 com - munication. these devices guarantee data rates up to 52mbps, even with a 3v power supply. excellent propaga - tion delay (15ns max) and package-to-package skew time (8ns max) make these devices ideal for multidrop clock distribution applications. the max3280e/max3281e/max3283e/max3284e have true fail-safe circuitry, which guarantees a logic-high receiver output when the receiver inputs are opened or shorted. the receiver output will be a logic high if all transmitters on a terminated bus are disabled (high impedance). these devices feature 1/4-unit-load receiver input impedance, allowing up to 128 receivers on the same bus. the max3280e is a single receiver available in a 5-pin sot23 package. the max3281e/max3283e single receivers have a receiver enable (en or en ) function and are offered in a 6-pin sot23 package. the max3284e features a voltage logic pin that allows compatibility with low-voltage logic levels, as in digital fpgas/asics. on the max3284e, the voltage threshold for a logic high is user-defined by setting v l in the range from 1.65v to v cc . the max3284e is also offered in a 6-pin sot23 package. applications clock distribution telecom racks base stations industrial control local area networks features esd protection: 15kv human body model 6kv iec 1000-4-2, contact discharge 12kv iec 1000-4-2, air-gap discharge guaranteed 52mbps data rate guaranteed 15ns receiver propagation delay guaranteed 2ns receiver skew guaranteed 8ns package-to-package skew time v l pin for connection to fpgas/asics allow up to 128 transceivers on the bus (1/4-unit-load) tiny sot23 package true fail-safe receiver -7v to +12v common-mode range 3v to 5.5v power-supply range enable (high and low) pins for redundant operation three-state output stage (max3281e/max3283e) thermal protection against output short circuit note 1: max3284e data rate is dependent on v l . +denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. /v denotes an automotive qualified part. part v l enable data rate package max3280e 52mbps 5-pin sot23 max3281e active high 52mbps 6-pin sot23 max3283e active low 52mbps 6-pin sot23 max3284e ? 52mbps (note 1) 6-pin sot23 part temp range pin- package top mark max3280e auk+t -40c to +125c 5 sot23 +advm max3280eauk/v+t -40c to +125c 5 sot23 +afme max3281e aut+t -40c to +125c 6 sot23 +abat max3283e aut+t -40c to +125c 6 sot23 +abau max3284e aut+t -40c to +125c 6 sot23 +abav 19-2320; rev 2; 12/12 selector guide ordering information max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
(all voltages referenced to gnd) supply voltage (v cc ) .............................................. -0.3v to +6v control input voltage (en, en ) ............................... -0.3v to +6v v l input voltage ...................................................... -0.3v to +6v receiver input voltage (a, b) ............................. -7.5v to +12.5v receiver output voltage (ro) ................. -0.3v to (v cc + 0.3v) receiver output voltage (ro) (max3284e) ................................... -0.3v to (v l + 0.3v) receiver output short-circuit current ...................... continuous continuous power dissipation (t a = +70c) 5-pin sot23 (derate 7.1mw/c above +70c) .......... 571mw 6-pin sot23 (derate 8.7mw/c above +70c) .......... 696mw operating temperature range max328_ea__ ............................................. -40c to +125c storage temperature range ............................ -65c to +150c junction temperature ...................................................... +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ....................................... +260c (v cc = 3v to 5.5v, v l = v cc , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v and t a = +25c.) (notes 2, 3) parameter symbol conditions min typ max units supply voltage v cc 3.0 5.5 v supply current i cc no load 9 15 ma v l input range v l max3284e 1.65 v cc v v l supply current i l no load (max3284e) 10 a receiver input current (a and b) i a, b v cc = v gnd or 5.5v v in = +12v 250 a v in = -7v -200 receiver differential threshold voltage v th -7v v cm +12v (note 4) -200 -125 -50 mv receiver input hysteresis ?v th v a + v b = 0v 25 mv receiver enable input low v enil max3281e, max3283e only 0.4 v receiver enable input high v enih max3281e, max3283e only 2 v receiver enable input leakage i leak max3281e, max3283e only 10 a receiver output high voltage v oh max3280e/max3281e/max3283e, i oh = -4ma, ro high v cc - 0.4 v max3284e, i oh = -1ma, 1.65v v l v cc , ro high v l - 0.4 receiver output low voltage v ol max3280e/max3281e/max3283e, i ol = 4ma, ro low 0.4 v max3284e, i ol = 1ma, 1.65v v l v cc , ro low 0.4 three-state output current at receiver i ozr 0 v o v cc , ro = high impedance 5 a receiver input resistance r in -7v v cm +12v (note 5) 48 k w receiver output short-circuit current i osr 0 v ro v cc 130 ma esd protection esd protection (a, b) human body model 15 kv iec1000-4-2 (air-gap discharge) 12 iec1000-4-2 (contact discharge) 6 maxim integrated 2 electrical characteristics stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
note 2: parameters are 100% production tested at +25c, limits over temperature are guaranteed by design. note 3: all currents into the device are positive; all currents out of the device are negative. all voltages are referenced to device ground, unless otherwise noted. note 4: v cm is the common-mode input voltage. v id is the differential input voltage. note 5: not production tested. guaranteed by design. note 6: see table 2 for max3284e data rates with v l < v cc . (vcc = 3.3v, ta = +25c, unless otherwise noted.) (v cc = 3v to 5.5v, v l = v cc , t a = t min to t max , unless otherwise noted. typical values are at v cc = 5v and t a = +25c.) (notes 2, 3) parameter symbol conditions min typ max units maximum data rate f max c l = 15pf (notes 5, 6) 52 mbps receiver propagation delay t plh figure 1, c l = 15pf, v id = 2v, v cm = 0v 7 15 ns t phl figure 1, c l = 15pf, v id = 2v, v cm = 0v 8 15 receiver output |t plh - t phl | t pskew figure 1, c l = 15pf, t a = +25c 2 ns device-to-device propagation delay matching same power supply, maximum temperature difference between devices = +30c (note 5) 8 ns enable/disable time for max3281e/max3283e receiver enable to output low t przl figure 2, c l = 15pf 500 ns receiver enable to output high t przh figure 2, c l = 15pf 500 ns receiver disable time from low t prlz figure 2, c l = 15pf 500 ns receiver disable time from high t prhz figure 2, c l = 15pf 500 ns 2.5 3.0 4.0 3.5 4.5 5.0 -50 0 -25 25 50 75 100 125 receiver output high voltage vs. temperature max3280/1/3/4e toc03 temperature ( c) receiver output high voltage (v) v cc = 5v v cc = 3.3v v a = 1v, b = gnd, i oh = -4ma 0 1 3 2 4 5 -50 -30 -40 -20 -10 0 receiver output high voltage vs. output current max3280/1/3/4e toc02 output current (ma) output voltage (v) v cc = 3.3v v cc = 5v 0 1 3 2 4 5 0 20 10 30 40 50 60 receiver output low voltage vs. output current max3280/1/3/4e toc01 output current (ma) output voltage (v) v cc = 3.3v v cc = 5v maxim integrated 3 typical operating characteristics switching characteristics www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
(v cc = 3.3v, t a = +25c, unless otherwise noted.) 0.001 0.01 0.1 1 10 v l supply current vs. temperature max3280/1/3/4 toc10 temperature ( c) v l supply current (ma) -50 25 50 -25 0 75 100 125 v cc = v l = 5v data rate = 52mbps v cc = v l = 3.3v data rate = 52mbps v cc = v l = 5v data rate = 100kbps v cc = v l = 3.3v data rate = 100kbps 0 2 6 4 8 10 supply current vs. data rate max3280/1/3/4e toc09 data rate (kbps) supply current (ma) 10 1000 100 10,000 100,000 i cc , v cc = v l = 5v i cc , v cc = v l = 3.3v i l , v cc = v l = 5v i l , v cc = v l = 3.3v 60 50 40 30 20 1.5 3.5 2.5 4.5 5.5 max3284e maximum data rate vs. voltage logic level max3280/1/3/4e toc08 voltage logic level (v) data rate (mbps) 5 6 7 8 9 supply current vs. temperature max3280/1/3/4e toc07 temperature ( c) supply current (ma) -50 25 50 -25 0 75 100 125 v cc = 5v v cc = 3.3v 6 7 8 9 10 -50 0 -25 25 50 75 100 125 receiver propagation delay (t phl ) vs. temperature max3280/1/3/4e toc06 temperature ( c) t phl (ns) v cc = 5v v cc = 3.3v 4 5 7 6 8 9 -50 0 -25 25 50 75 100 125 receiver propagation delay (t plh ) vs. temperature max3280/1/3/4e toc05 temperature ( c) t plh (ns) v cc = 5v v cc = 3.3v 0 50 100 150 200 -50 0 -25 25 50 75 100 125 receiver output low voltage vs. temperature max3280/1/3/4e toc04 temperature ( c) receiver output low voltage (mv) v cc = 5v v cc = 3.3v a = gnd, v b = 1v, i ol = 4ma maxim integrated 4 typical operating characteristics (continued) www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
detailed description the max3280e/max3281e/max3283e/max3284e are single, true fail-safe receivers designed to operate at data rates up to 52mbps. the fail-safe architecture guarantees a high output signal if both input terminals are open or shorted together. see the true fail-safe section. this feature assures a stable and predictable output logic state with any transmitter driving the line. these receivers func - tion with a 3.3v or 5v supply voltage and feature excellent propagation delay times (15ns). the max3280e is a single receiver available in a 5-pin sot23 package. the max3281e (en, active high) and max3283e ( en , active low) are single receivers that also contain an enable pin. both the max3281e and max3283e are available in a 6-pin sot23 package. the max3284e is a single receiver that contains a v l pin, which allows communication with low-level logic included in digital fpgas. the max3284e is available in a 6-pin sot23 package. the max3284es low-level logic application allows users to set the logic levels. a logic high level of 1.65v will limit the maximum data rate to 20mbps. 15kv esd protection esd-protection structures are incorporated on the receiver input pins to protect against esd encountered during handling and assembly. the max3280e/ max3281e/max3283e/max3284e receiver inputs (a, b) have extra protection against static electricity found in normal operation. maxims engineers developed state-of-the-art structures to protect these pins against 15kv esd without damage. after an esd event, this family of parts continues working without latchup. esd protection can be tested in several ways. the receiver inputs are characterized for protection to the following: 15kv using the human body model 6kv using the contact discharge method specified in iec 1000-4-2 (formerly iec 801-2) 12kv using the air-gap discharge method specified in iec 1000-4-2 (formerly iec 801-2) esd test conditions esd performance depends on a number of conditions. contact maxim for a reliability report that documents test setup, methodology, and results. human body model figure 3a shows the human body model, and figure 3b shows the current waveform it generates when dis - charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of interest, which is then discharged into the device through a 1.5k w resistor. iec 1000-4-2 since january 1996, all equipment manufactured and/or sold in the european community has been required to meet the stringent iec 1000-4-2 specifica- tion. the iec 1000-4-2 standard covers esd test - ing and performance of finished equipment; it does not specifically refer to integrated circuits. the max3280e/max3281e/max3283e/max3284e help pin name function max3280e max3281e max3283e max3284e 1 1 1 1 v cc positive supply: 3v v cc 5.5v. bypass with a 0.1f capacitor to gnd. 2 2 2 2 gnd ground 3 3 3 3 ro receiver output. ro will be high if (v a - v b ) -50mv. ro will be low if (v a - v b ) -200mv. 4 4 4 4 b inverting receiver input 5 en receiver output enable. drive en low to enable ro. when en is high, ro is high impedance. 5 en receiver output enable. drive en high to enable ro. when en is low, ro is high impedance. 5 v l low-voltage logic-level supply voltage. v l is a user-defined voltage, ranging from 1.65v to v cc . ro output high is pulled up to v l . bypass with a 0.1f capacitor to gnd. 5 6 6 6 a noninverting receiver input maxim integrated 5 pin description www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
users design equipment that meets level 3 of iec 1000- 4-2, without additional esd-protection components. the main difference between tests done using the human body model and iec 1000-4-2 is higher peak current in iec 1000-4-2. because series resistance is lower in the iec 1000-4-2 esd test model (figure 4a), the esd- withstand voltage measured to this standard is generally lower than that measured using the human body model. figure 4b shows the current waveform for the 8kv iec 1000-4-2 level 4 esd contact discharge test. the air- gap test involves approaching the device with a charger probe. the contact discharge method connects the probe to the device before the probe is energized. machine model the machine model for esd testing uses a 200pf stor - age capacitor and zero-discharge resistance. it mimics the stress caused by handling during manufacturing and assembly. all pins (not just the rs-485 inputs) require this protection during manufacturing. therefore, the machine model is less relevant to the i/o ports than are the human body model and iec 1000-4-2. true fail-safe the max3280e/max3281e/max3283e/max3284e guar - antee a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all drivers disabled. this guaranteed logic high is achieved by setting the receiver threshold between -50mv and -200mv. if the differential receiver input voltage (v a - v b ) is greater than or equal to -50mv, ro is logic high. if (v a - v b ) is less than or equal to -200mv, ro is logic low. in the case of a terminated bus with all transmitters dis - abled, the receivers differential input voltage is pulled to ground by the termination. this results in a logic high with a 50mv minimum noise margin. unlike previous fail-safe devices, the -50mv to -200mv threshold complies with the 200mv eia/tia-485 standard. receiver enable (max3281e and max3283e only) the max3281e and max3283e feature a receiver out - put enable (en, max3281e or en , max3283e) input that controls the receiver. the max3281e receiver enable (en) pin is active high, meaning the receiver outputs are active when en is high. the max3283e receiver enable ( en ) pin is active low. receiver outputs are high impedance when the max3281es en pin is low and when the max3283es en pin is high. low-voltage logic levels (max3284e only) an increasing number of applications now operate at low-voltage logic levels. to enable compatibility with these low-voltage logic level applications, such as digital fpgas, the max3284e v l pin is a user-defined supply voltage that designates the voltage threshold for a logic high. at lower v l voltages, the data rate will also be lower. a logic-high level of 1.65v will receive data at 20mbps. table 2 gives data rates at various voltages at v l . applications information propagation delay matching the max3280e/max3281e/max3283e/max3284e (v cc = v l ) exhibit propagation delays that are closely matched from one device to another, even between devices from different production lots. this feature allows multiple data lines to receive data and clock signals with minimal skew with respect to each other. figure 5 shows the typical propagation delays. small receiver skew times, the differ - ence between the low-to-high and high-to-low propagation delay, help maintain a symmetrical ratio (50% duty cycle). the receiver skew time | t plh - t phl | is under 2ns for either a 3.3v supply or a 5v supply. multidrop clock distribution low package-to-package skew (8ns max) makes the max3280e/max3281e/max3283e/max3284e (v cc = v l ) ideal for multidrop clock distribution. when distributing a clock signal to multiple circuits over long transmission lines, receivers in separate locations, and possibly at two different temperatures, would ideally table 1. max3281e/max3283e enable table table 2. max3284e data rate table v cc = 3v to 5.5v v l maximum data rate 1.65v 20mbps 2.2v 33mbps 3.3v 52mbps part enable = high enable = low max3281e active high z max3283e high z active maxim integrated 6 www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
provide the same clock to their respective circuits. thus, minimal package-to-package skew is critical. the skew must be kept well below the period of the clock signal to ensure that all of the circuits on the network are synchronized. 128 receivers on the bus the standard rs-485 input impedance is 12k w (one- unit load). the standard rs-485 transmitter can drive 32 unit loads. the max3280e/max3281e/max3283e/ max3284e present a 1/4-unit-load input impedance (48k w ), which allows up to 128 receivers on the bus. any combination of these rs-485 receivers with a total of 32 unit loads can be connected to the same bus. thermal protection the max3280e/max3281e/max3283e/max3284e fea - ture thermal protection. thermal protection sets the out - put stage in high-impedance mode when a short circuit occurs at the output, limiting both the power dissipation and temperature. the thermal temperature threshold is +165c, with a hysteresis of 20c. figure 2. max3281e/max3283e receiver enable/disable timing figure 1. receiver propagation delay t przh out en out en v cc /2 v cc /2 v cc 0 v oh 0 v cc 0 v oh 0 for max3281e the enable signal is inverted. s1 open s2 closed s3 = 1.5v s1 open s2 closed s3 = 1.5v 0.25v t prhz t prlz v cc /2 0.25v out en out en v cc 0 v cc v ol v cc 0 v cc v ol s1 closed s2 open s3 = -1.5v s1 closed s2 open s3 = -1.5v t przl v cc /2 v cc /2 generator 1.5v -1.5v v id r c l 1k? s1 v cc s2 50? s3 v cc /2 v oh v ol a b 1v ro -1v f in = 1mhz t r , t f 3ns output input v cc /2 v cc /2 t phl t plh maxim integrated g 7 test circuits/timing diagrams www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
figure 5. receiver propagation delay driven by external rs-485 device figure 4b. iec 1000-4-2 esd generator current waveform figure 4a. iec 1000-4-2 esd test model figure 3b. human body model current waveform figure 3a. human body esd test model 10ns a, 1v/div ro, 2.5v/div b = gnd t r = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% i peak i charge-current limit resistor discharge resistance storage capacitor c s 150pf r c 50? to 100? r d 330? high- voltage dc source device under test i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes charge-current limit resistor discharge resistance storage capacitor c s 100pf r c 1m? r d 1.5k? high- voltage dc source device under test maxim integrated g 8 test circuits/timing diagrams (continued) www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
package type package code outline no. land pattern no. 5 sot23 u5+2 21-0057 90-0174 6 sot23 u6+1 21-0058 90-0175 data in transmitter 120? ro1 ro2 en en max3283e max3281e max3281e/max3283e in redundant receiver application gnd b ro 1 5 a + v cc max3280e sot23-5 top view 2 3 4 gnd b ro 1 6 a 5 v cc max3281e max3283e sot23-6 2 3 4 en (en) ( ) are for max3283e gnd b ro 1 6 a 5 v cc max3284e sot23-6 2 3 4 v l + + maxim integrated 9 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. chip information process: bicmos typical operating circuit pin confgurations www.maximintegrated.com max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers
revision number revision date description pages changed 0 1/02 initial release 1 3/11 added lead-free parts to the ordering information , deleted the transistor count from the chip information section 1, 9 2 12/12 added automotive qualified part to ordering information 1 ? 2012 maxim integrated products, inc. 10 revision history maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max3280e/max3281e/ max3283e/max3284e 15kv esd-protected 52mbps, 3v to 5.5v, sot23 rs-485/rs-422 true fail-safe receivers for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.


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